M. Tech VLSI Design programme

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The Admission Brochures and other related details in this regard are available on the University website www.ipu.ac.in

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M. Tech VLSI Design programme of CDAC, Noida is AICTE approved and affiliated to Guru Gobind Singh Indraprastha University (GGSIPU), Delhi

CDAC, Noida is running the M.Tech (VLSI) Program since 2004. The intake is 25 students per year. The M Tech Programmge is of two years. The objective of the program is to offer an industry specific Career oriented advanced courses in VLSI Design and create quality manpower in the field of VLSI Engineering to promote VLSI research, education, and training in India. The Research area in M. Tech (VLSI) is mainly focused on Low power circuit designing, Analog Digital Mixed signal design circuitry and characterization. Fields in which interdisciplinary work has been undertaken include, Algorithms for design Automation, RFID for wireless communication, wireless sensor networks, and Low power DSP. Special features in M. Tech (VLSI Design) programme include regular seminars from external experts in all the courses. Approximately 325 highly skilled manpower generated by the division are already working in the industries like Cadence, Synopsys, Mentor Graphics, Wipro, Intel, HCL and many more.

The students intake is preferred to be GATE qualified students. The GATE qualified candidates in M. Tech program are likely to get scholarship through AICTE. The number of seats available is 25.

Eligibility Condition

(A) Minimum 60% or equivalent in the qualifying examination as under:-
  1. B.Tech./B.E. in Electronics & Communication/Electronics Engineering or equivalent
  2. Graduate in IETE/AMIE (ECE)
  3. M.Sc.(Electronics) or equivalent two year's Master's Degree (Regular)
  1. GATE qualified in Electronics & Communication Engineering.
  2. CET Code 140 qualified (for Non-GATE) candidates
(B) Admission Criteria for CET Code 139 & 140:
  1. For normal seats in Regular programme: The merit list will be prepared on the basis of the qualified and valid GATE score. If seats remain vacant after admitting students with qualified and valid GATE Score, then the admission for vacant seats shall be made on the basis of CET rank/merit for NON GATE Candidates, subject to securing of a minimum of 60% marks in qualifying degree.

    The procedure for admission in this course is given below:

    • See the advertisement in the month of May/June on GGSIP University www.ipu.ac.in
    • Candidates have to apply online.,
    • Submit the online application form; please note that once you submit application form, you will not be able to change any details in the form once it is locked.
    • A written test CET is conducted during May-June for non-gate students and merit is prepared.
    • The merit list of gate as well as CET students has to be published on IPU website. 85% seats are reserved for Delhi residents.
    • Students have to participate in counseling. The counseling schedule is uploaded on IPU website. At the time of counseling the student has to pay the total course fee through DD. The details are given in admission brochure.
    • After admission the student has to join the institute where he/she has taken the admission with admission receipt, 5 Passport size latest color photograph and original certificated and mark sheets for verification.

GATE qualified candidates will get AICTE scholarships, subject to the terms and condition provided by AICTE in term of attendance and other criteria. From GATE qualified students, who are getting scholarship, teaching assistant can be asked to conduct labs, help an instructor in grading, and other course-related tasks as per AICTE norms.

The state of art laboratory equipped with latest systems and tools is available for the M Tech Students on one system per student basis. All systems are connected through LAN
Full suite of Mentor Graphics EDA Tools for front and back end design are available for the VLSI Design Lab and thesis work.
In addition to that the laboratory is supported by Xilinx FPGA boards, TIs DSP Boards, TIs Analog Boards and ARM and AVR boards.

The Library has a collection of over 21161 publications which include books, bound volumes of journals, thesis/dissertations, rare books, reports, government documents. The Library has subscription of 74 periodicals/journals. The books are issued to the students for the maximum for 15 days except reference book, Data books, Directories, Hand books, Reports, Standards. The books, which are not available in the library, are procured on the request of members. The reprographic facility is available for all members and students. IEEE and ACM online access of Journals and Conference Proceedings are also available inside the institute. More Details

C-DAC, Noida has its own hostel inside the campus at B-30, Sector 62, Noida. There are two separate but interconnected wings for boys and girls each having 50 twin sharing spacious rooms with air - conditioned dining hall and other modern amenities to ensure comfortable stay of the students. More Details

CDAC provides a strong base for placement and industrial training requirement of the program. The students are assigned the projects on full time basis as per course requirement, in their 4th semester. Further the work culture of the organization provides a good environment to students to interact and get first hand information for working on live projects during their class room teaching too.
Companies / Institutes where students are placed:
HCL Technologies, Cadence Design Systems, Virage Logic, NIT Delhi, JIIT UP, FreeScale, Mentor Graphics, Transwitch, DRDO, ISRO, Wipro, Intel. The highest annual package of Rs 8.0 Lac s per Annum.

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  1. Ms Ashima (2010-2012) Batch, M.Tech VLSI ) won Gold Medal for achieving first rank in academics.
  2. Ms Aakriti Chabra (2009-2011) Batch, M.Tech VLSI ) won Gold Medal for achieving first rank in academics.
  3. Mr Vimal Kant Pandey, (2008-2010 Batch, M.Tech VLSI ) won Gold Medal for achieving first rank in academics.
  4. Mr Jagannathan (2007-2009) Batch, M.Tech VLSI ) won Gold Medal for achieving first rank in academics.
  5. Mr Peeyush Kumar Tripathi, (2006-2008) Batch, M.Tech VLSI ) won Gold Medal for achieving first rank in academics.
  6. Mr Nirbindu Das participated at 58th international astronautically congress held at Hyderabad from 24th to 28th September, 2008 and won the award and cash prize on his write up : "Mining and Manufacturing on Moon: Future Applications".
  7. Sports Meet Awards to students : Mr Sandeep Singh Ghuman and Mr Mohit Kumar participated in sports meet and have won awards.
  8. Techkriti Awards: Mr Mayank Tripathi (Technical Paper : 1st Prize), Mr. Praveen Kumar, Mr Bipin Kumar and Mr. Ashish (Quize: 1st prize), Mr. Satish Kumar (Mr CDAC )and Mr Jagannathan (Essay: 2nd Prize).
  9. Mr. N S Praphulla Chandra, (2005-2007 Batch, M. Tech VLSI) won Gold Medal for achieving first rank in academics.
  10. Mr Vichal Verma (2005-2007 Batch, M. Tech VLSI), won, Instant Recognition Award by Cadence Noida Branch.
  11. Sports Meet Awards to students (2005-2007) batch: Mr Sandeep Singh Ghuman and Mr Mohit Kumar participated in sports meet at CDAC Noida and have won awards in badminton and tennis.
  12. Mr. Kapil Raj (2004-2006 Batch, M. Tech VLSI) won Gold Medal for achieving first rank in academics.

For Further Details Please Contact:
Academic Block , B-30,Institution Area,
Sector - 62,Noida - 201307,UP,India
Ph. No: 0120-3063380